matlab-dsphdl-ddc-design
Use when designing a Digital Down Converter (DDC) using dsphdl System objects. Triggers on requests involving DDC design, frequency down-conversion for FPGA/ASIC, NCO + mixer + decimation filter chains, fractional/non-integer sample rate conversion, or HDL-optimized receiver front-end signal processing.
npx skills add matlab/matlab-agentic-toolkit --skill matlab-dsphdl-ddc-design --agent claude-code
Same command for any agent — swap --agent for codex, cursor, copilot.
Weekly change comes from our own snapshots, not the repository page — it measures attention, not adoption.
What it does
Designs and simulates a Digital Down Converter (DDC) workflow using dsphdl System objects to perform frequency down-conversion with an NCO, a complex mixer, and a multi-stage decimation filter chain (CIC + FIR, with optional Farrow for non-integer decimation). It covers both integer and non-integer decimation paths, suggests HDL code generation steps, and provides concrete instructions for parameter computation (phase increment, decimation factors, and NumCycles) as well as testbench and HDL generation caveats.
How it works
- It describes an end-to-end MATLAB workflow: RF Input → [Mixer] → [CIC Decimator] → [Compensation FIR Decimator] → Baseband Output for integer decimation; or with Farrow for non-integer decimation: RF Input → [Mixer] → [CIC Dec (xR)] → [Farrow (L/M)] → [FIR Dec (xD)] → Baseband Output.
- It specifies NCO phase increment calculation: phaseInc = round((-Fc * 2^AccumulatorWL) / Fs).
- It instructs using dsp.CICCompensationDecimator to design a compensation filter (with a warning not to use it in HDL code generation), and to pre-compute its coefficients for HDL by running the design script in MATLAB and then embedding the numerically computed coefficients in the HDL function.
- It details instantiating dsphdl System Objects: NCO, CICDecimator, FIRDecimator with explicit parameter names and values, including OutputDataType set to 'Same word length as input' and NumCycles alignment with CIC rate change.
- It provides a step-by-step HDL workflow: pre-computing coefficients, creating an HDL design function that persists the objects, and a testbench that prints sample counts and plots time-domain I/Q and spectrum.
- It outlines the Interactive Requirements Gathering process (AskUserQuestion) and the six questions to collect Fs, Fc, output rate, input data type, decimation staging, CIC parameters, and HDL language.
- It includes a complete code-style example showing how to simulate the DDC end-to-end and how to generate HDL-ready code by pre-computing coefficients and hardcoding them into the HDL function.
When to use it
- When designing a DDC or receiver front-end for FPGA/ASIC.
- When building an NCO + mixer + decimation chain with dsphdl objects.
- When handling non-integer decimation using Farrow-based paths, and when generating Verilog/VHDL for a complete DDC subsystem.
What it can touch
- Tools: claude-code, codex, copilot.
- It references using the dsphdl System Objects (NCO, CICDecimator, FIRDecimator) and the dsp.CICCompensationDecimator design function (not HDL-compatible).
- HDL generation workflow involves hardcoding pre-computed FIR coefficients into the HDL function and creating a testbench.
Caveats
- dsp.CICCompensationDecimator is NOT supported for HDL code generation; coefficients must be pre-computed in MATLAB and embedded directly.
- The design requires persistent objects in the HDL wrapper and initialization inside an isempty block.
- The process emphasizes always piping valid signals through the chain and avoiding conditional calls downstream; all stages run every clock cycle with paired data/valid signals.
- The workflow includes a check: signalBandwidth/2 < Fs_out/2 to ensure compatibility of bandwidth with output Nyquist rate; otherwise, adjust bandwidth or increase output rate.
# dsphdl DDC: Design, Simulate, Generate HDL ## Overview End-to-end MATLAB workflow for designing a Digital Down Converter (DDC) using `dsphdl` System objects — combining an NCO (local oscillator), complex mixer, and multi-stage decimation filter chain — then simulating the streaming HDL-optimized design and generating synthesizable HDL via HDL Coder. **Integer decimation (all stages have integer rate change):** ``` RF Input → [Mixer] → [CIC Decimator] → [Compensation FIR Decimator] → Baseband Output ↑ [NCO] (generates cos + jsin at carrier frequency) ``` **Non-integer decimation (uses Farrow for fine rate adjustment):** ``` RF Input → [Mixer] → [CIC Dec (xR)] → [Farrow (L/M)] → [FIR Dec (xD)] → Baseband Output ↑ [NCO] ``` ## When to Use - Designing a DDC or receiver front-end for FPGA/ASIC - Building an NCO + mixer + decimation chain with `dsphdl` objects - **Non-integer decimation** — when the target output rate doesn't divide evenly into the input rate - Converting a floating-point DDC algorithm to HDL-ready streaming architecture - Generating Verilog/VHDL for a complete DDC subsystem ## When Not To Use - Non-HDL workflows, e.g. embedded C code generation ## Critical Conventions
- Overview
- When to Use
- When Not To Use
- Critical Conventions
- NCO Phase Increment
- Mixer: direct multiply with fi() arithmetic — NO conjugate
- OutputDataType — ALWAYS use "Same word length as input"
- FIR NumCycles for resource sharing
- NCO PhaseIncrementSource
- Valid signal piping — NEVER use if-statements on valid
- Data-valid pairing — ALWAYS gate data with its corresponding valid
- Test signals — sinusoid modulated onto complex carrier
- All System objects MUST be persistent
- Interactive Requirements Gathering (REQUIRED)
What does the matlab-dsphdl-ddc-design skill do?
Use when designing a Digital Down Converter (DDC) using dsphdl System objects. Triggers on requests involving DDC design, frequency down-conversion for FPGA/ASIC, NCO + mixer + decimation filter chains, fractional/non-integer sample rate conversion, or HDL-optimized receiver front-end signal processing.
How do I install it?
Run `npx skills add matlab/matlab-agentic-toolkit --skill matlab-dsphdl-ddc-design --agent claude-code` — it drops the skill into your project so the agent can pick it up. Swap the --agent value for codex, cursor or copilot if you use one of those.
Where does this skill come from?
From matlab/matlab-agentic-toolkit, a repository with 868 stars. We read it straight from the repository tree rather than a submitted listing, so what you see here is what is actually published.
Is a popular skill a good skill?
Not necessarily. Stars measure attention, not adoption — a repository can trend for a week and be abandoned. That is why we show the weekly change from our own snapshots next to the total, instead of a single flattering number.