Agent skill

asplos-experiments

Use when designing or auditing the evaluation of an ASPLOS paper — choosing among real silicon, FPGA prototypes, and simulators with cycle-accuracy caveats stated, selecting workload suites and baselines that hold up across three communities, attributing wins via ablation, and reporting energy, area, and overhead honestly.

brycew6m4,252★ · +31/wk · 3 repos on radarProfile →
claude-codeMIT
Install
npx skills add brycewang-stanford/Awesome-Journal-Skills --skill asplos-experiments --agent claude-code

Same command for any agent — swap --agent for codex, cursor, copilot.

Facts
Files in the skill folder: 1
SKILL.md size: 8 KB
Bundled scripts: none
Path: ASPLOS-Skills/skills/asplos-experiments/SKILL.md
Open the folder on GitHub →
Where it comes from
Stars: 909 · +31 this week
Language: Stata
Read our review of the source →

Weekly change comes from our own snapshots, not the repository page — it measures attention, not adoption.

From the SKILL.md

# ASPLOS Experiments An ASPLOS evaluation answers to three communities at once: architects who will audit the modeling, OS people who will audit the workload realism, and PL people who will audit what the software layer actually does. The section's core discipline is **matching each claim to an instrument whose error model can carry it** — and saying what that error model is. ## The instrument ladder | Instrument | What it can prove | What it cannot | Must be reported | |---|---|---|---| | Real silicon | End-to-end effects, OS interactions, true tails | Designs needing hardware that doesn't exist | CPU/stepping, kernel + config, microcode, BIOS knobs (SMT/turbo/prefetchers), memory topology | | FPGA prototype | Feasibility, cycle behavior of new logic at the prototype's clock | Absolute performance of an ASIC-class part | Board, clock, resource utilization, what was scaled down and why | | Cycle-level simulator (e.g. gem5-class) | Relative effects of microarchitectural change under stated configs | Anything outside modeled fidelity — I/O, OS noise, firmware behavior are commonly stylized | Simulator + exact version/commit, config files, warm-up and region-selection method, validati

What's inside
Steps it walks through
  1. The instrument ladder
  2. Cycle-accuracy caveats are content, not apology
  3. Workloads and baselines that survive three audiences
  4. Attribution: ablate the mechanism you credit
  5. The claim-instrument matrix
  6. Measurement noise on real hardware is a design input
  7. Energy, power, and area claims
  8. Evaluation-methodology papers
  9. Sweeps and knees
  10. Output format
More from Awesome-Journal-Skills
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About this skill
What does the asplos-experiments skill do?

Use when designing or auditing the evaluation of an ASPLOS paper — choosing among real silicon, FPGA prototypes, and simulators with cycle-accuracy caveats stated, selecting workload suites and baselines that hold up across three communities, attributing wins via ablation, and reporting energy, area, and overhead honestly.

How do I install it?

Run `npx skills add brycewang-stanford/Awesome-Journal-Skills --skill asplos-experiments --agent claude-code` — it drops the skill into your project so the agent can pick it up. Swap the --agent value for codex, cursor or copilot if you use one of those.

Where does this skill come from?

From brycewang-stanford/Awesome-Journal-Skills, a repository with 909 stars. We read it straight from the repository tree rather than a submitted listing, so what you see here is what is actually published.

Is a popular skill a good skill?

Not necessarily. Stars measure attention, not adoption — a repository can trend for a week and be abandoned. That is why we show the weekly change from our own snapshots next to the total, instead of a single flattering number.

Keep going